SIMULATION SUCCESS STORIES

Besi Improved Memory Chip Manufacturing with Multiphysics Simulation

Fabrication de Semi-conducteurs

Stefan Behler, Besi, Switzerland

As memory chips become smaller and smaller, designers must ensure that the chips stay intact during the manufacturing process. Besi develops equipment and assembly processes for substrate and wafer packaging production in markets such as consumer electronics, automotive, industrial, and solar energy. Stefan Behler, a senior expert process engineer, used multiphysics simulation to explore and optimize a new way of peeling off the tape on a memory chip that results in less deformation of the dies. This new method is now used by semiconductor packaging factories all over the world.

  •  /
1
Loading PDF...

Suggested Stories

Inspiring Young Engineers to Design for the Future at EPFL

Inspiring Young Engineers to Design for the Future at EPFL

EPFLoop, from the Swiss Federal Institute of Technology Lausanne (EPFL), designed their pod for the 2018 SpaceX ...

Keynote: Using {:comsolmph} for Circuit Board Thermal Analysis

Keynote: Using COMSOL Multiphysics® for Circuit Board Thermal Analysis

The aerospace and defense industry requires stronger circuit boards than those needed for everyday electronics due to ...

Développer de meilleurs résonateurs pour la technologie CMOS

Développer de meilleurs résonateurs pour la technologie CMOS

Les technologies sub-GHz sont utilisées en masse pour la domotique, la surveillance des infrastructures, etc. Cette ...

The Thermal Management of Li-ion Battery Packs

The Thermal Management of Li-ion Battery Packs

At the Fiat Research Center in Italy, Michele Gosso and Antonio Fiumara are working on the development of providing ...